1. Field of the Invention
The present invention relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus.
2. Description of the Related Art
Solid-state imaging devices are broadly classified into amplified solid-state imaging devices represented by CMOS (Complementary Metal Oxide Semiconductor) image sensors and charge-transfer solid-state imaging devices represented by CCD (Charge Coupled Device) image sensors. These types of solid-state imaging devices are widely used in digital still cameras and digital video cameras. In recent years, the CMOS image sensors have often been used as solid-state imaging devices mounted on mobile apparatuses, such as camera-equipped mobile phones or PDAs (Personal Digital Assistants), from the viewpoint of low power supply voltages and power consumption.
So-called back-illuminated CMOS image sensors, in which light enters from a back side of a substrate opposite to a side provided with a multilevel wiring layer, have been suggested (e.g., see Japanese Unexamined Patent Application Publication No. 2003-31785) as solid-state imaging devices and are now under development.
FIG. 10 illustrates an example of the back-illuminated CMOS solid-state imaging device according to a related art. FIG. 10 is a cross-sectional view of a main part of an imaging region. In FIG. 10, a surface on the side irradiated with incident light L of a silicon portion (corresponding to a semiconductor substrate) 112 is a back surface 112B, and a surface on the opposite side is a front surface 112A.
In the back-illuminated CMOS solid-state imaging device 111, a plurality of pixels including photodiodes PD serving as photoelectric conversion elements and a plurality of pixel transistors are arrayed in the silicon portion 112. On the front surface 112A side of the silicon portion 112, gate electrodes 121 and 122 of the pixel transistors are formed. Also, a multilevel wiring layer 126 including a plurality of wiring layers 125 disposed via an interlayer insulating film 124, and a support substrate 127 are formed. The multilevel wiring layer 126 and the support substrate 127 are bonded via a bonding layer 128. A p-type semiconductor region 129 included in the silicon portion 112 is disposed at the back surface 112B on an interface between the silicon portion 112 and an interlayer insulating film 130. On-chip color filters 131 and on-chip lenses 132 are formed on the interlayer insulating film 130. Reference numeral 133 denotes a unit pixel.
Each of the photodiodes PD includes a p-type semiconductor region 113, an n-type semiconductor region 114 serving as a charge accumulating region, and an n− semiconductor region 115 having a relatively low impurity concentration. Those regions 113 to 115 are disposed in this order from the front surface 112A side to the back surface 112B side of the p-type silicon portion 112. The n− semiconductor region 115 extends to under (above in FIG. 10) a region where the pixel transistors are formed.
In the silicon portion 112, n-type source/drain regions 117, 118, and 119 are formed on the front surface 112A side, and the gate electrodes 121 and 122 are formed via a gate insulating film, whereby a plurality of pixel transistors are formed. The plurality of pixel transistors may be the following three transistors: a transfer transistor; a reset transistor; and an amplification transistor. Alternatively, four transistors may be used by adding a selection transistor.
In the CMOS solid-state imaging device 111, incident light L enters from the upper side of FIG. 10 (from the back surface 112B side), is bent by the on-chip lenses 132 so as to be focused onto the photodiodes PD, and enters the photodiodes PD after color components are separated by the on-chip color filters 131. On receiving the incident light L, the photodiodes PD perform photoelectric conversion thereon.
The incident light L that has entered the vicinity of a border between the pixels 133 passes through the vicinity of a border between the on-chip lenses 132 and enters the silicon portion 112. At the vicinity of the border between the on-chip lenses 132, light passes without being sufficiently bent and photoelectric conversion is performed on the light in that state. Since the photodiodes PD are separated at the vicinity of the border between the pixels 133, photoelectrons produced through photoelectric conversion performed between the photodiodes PD enter any of the photodiodes PD depending on probability.
For example, photoelectrons produced from light that has passed through a green (G) on-chip color filter should ideally enter the photodiode PD under the G on-chip color filter, but actually enter the photodiode PD under an adjoining red (R) or blue (B) on-chip color filter with certain probability. Such a phenomenon where the pixel corresponding to the on-chip color filter through which light has passed is different from the pixel where photoelectrons are detected is called “color mixture”, which deteriorates color reproducibility.
The color mixture is significant when light obliquely enters. Depending on an angle, light that has obliquely passed through an edge of the on-chip color filter may enter the photodiode PD of an adjoining pixel.
In order to suppress the color mixture, a related art has employed a light-shielding metal 141 placed between the pixels 133, as illustrated in FIG. 8. The light-shielding metal 141 is placed to be embedded in the interlayer insulating film 130. Area IX near the light-shielding metal 141 is illustrated in an enlarged view in FIG. 9. As illustrated in FIG. 9, a silicon dioxide film 142 is formed above the silicon portion 112, a light-shielding metal containing Al or W is formed thereon, and then patterning is performed to produce the interpixel light-shielding metal 141. Furthermore, the light-shielding metal 141 is covered by a silicon-nitride (SiN) film 143 for passivation and spectral adjustment, and a planarizing film 144 including a silicon dioxide (SiO2) film or an organic film is formed on the SiN film 143. The on-chip color filters 131, an organic planarizing layer 145, and the on-chip lenses 132 are formed on the planarizing film 144.
In many cases, a pixel unit of the CMOS solid-state imaging device 111 includes an optical black (OPB) portion outside an effective pixel portion. The OPB portion is covered by a metal layer (light-shielding metal) and is shielded to detect a black level. In the effective pixel portion other than the OPB portion, the light-shielding metal opens above the photodiodes PD of the pixels and covers the portions between the pixels. Accordingly, incident light L between the pixels is blocked to suppress color mixture.
On the other hand, Japanese Unexamined Patent Application Publication No. 2005-347709 discloses a back-illuminated CMOS solid-state imaging device that has a configuration including an element separating region formed between photodiodes corresponding to an ineffective region between on-chip lenses adjoining to each other. Also, Japanese Unexamined Patent Application Publication No. 2006-19653 discloses a back-illuminated CMOS solid-state imaging device that has a configuration including a metal light-shielding film formed between pixels and in an OPB portion. The metal light-shielding film has a fixed potential.